Experience

  • logic design engineer

    at intel

    April 2018 - at Present

    Singapore

  • senior R&D Engineer

    at synopsys

    May 2017 - April 2018

    Bangalore Urban - Karnātaka

  • logic design engineer

    at intel

    August 2014 - April 2017

    Bangalore Urban - Karnātaka

  • senior design engineer

    at soctronics

    May 2010 - August 2014

    Hyderābād - Telangana

Education

  • Diploma in VLSI Design

    at veda iit

    2009 - 2010 (1 year) Hyderābād - Telangana

  • B.E in Electronics and communications Engineering

    at Archarya Nagarjuna University

    2005 - 2009 (4 years) Guntūr - Andhra Pradesh

Knowledge and keywords

Languages

  • English Negotiation

  • Hindi Conversation

  • Telugu Native

Hives