- Entry level
- No Education
- Salary to negotiate
ASIC/ Layout Design Engineer 2
Location: Markham, CA
What you do at AMD changes everything
At AMD, we push the boundaries of what is possible. We believe in changing the world for the better by driving innovation in high-performance computing, graphics, and visualization technologies – building blocks for gaming, immersive platforms, and the data center.
Developing great technology takes more than talent: it takes amazing people who understand collaboration, respect, and who will go the “extra mile” to achieve unthinkable results. It takes people who have the passion and desire to disrupt the status quo, push boundaries, deliver innovation, and change the world. If you have this type of passion, we invite you to take a look at the opportunities available to come join our team.
The Display Controller team within the Radeon Technologies Group(RTG) is looking for an individual to participate in the design verification of the Display IP.
The candidate would participate on a team of design verification, architects and design engineers, working closely with other team members to understand and verify the functionality of the design within the context of the unit, block, and overall system. The candidate would be responsible for carefully documenting and executing test plans consisting of directed and random tests to be run under simulation and hardware acceleration. Experience with hardware modeling, assertions, and formal verification methods are valuable assets. The candidate would be expected to adopt evolving verification methodologies used in the industry as well as develop custom techniques to functionally verify increasingly complex IP designs within aggressive, market-driven schedules.
Education and Experience Required:
Min. Bachelor of Science Degree in Electrical Engineering, Computer Science, or Computer Engineering.
Co-op/Internship demonstrating verification experience on large ASIC development projects or equivalent embedded programming experience an asset
Very strong background in C/C++/OOO coding techniques
Experience with Verilog and/or System Verilog
Experience working with Cadence NCSIM, Synopsys VCS or equivalent
Experience working with UVM, OVM or equivalent
Experience with scripting languages, Ruby/Python/Tcl/BASH/etc.
Working knowledge of UNIX/Linux operating systems and debug tools
Interest in developing custom verification tools and driving new test methodologies
Strong analytical skills and attention to detail
Excellent written and communication skills
Team player with proven leadership skills
Understand the architecture of the Display IP and functional blocks being designed
Build SystemVerilog and/or C/C++ models and test sequence libraries for simulation
Build test bench and monitors for DUT
Compose test and coverage plan, and validation vectors to ensure functional completeness
Debug function/performance bugs of Display IP
Requisition Number: 69972
Country: Canada State: Ontario City: Markham
Job Function: Design
AMD welcomes and encourages applications from people with disabilities. Reasonable accommodations are available for applicants with disabilities during the recruitment process, unless undue hardship to AMD would result. Any applicant who requires accommodation should contact AskHR@amd.com
AMD does not accept unsolicited resumes from headhunters, recruitment agencies or fee based recruitment services.
About the company
Our history is marked by a commitment to innovation that's truly useful to our customers — putting the real needs of people ahead of technical one-upmanship.
“Technology for technology's sake” is not the way we do business at AMD. AMD founder Jerry Sanders has always maintained, “customers should come first, at every stage of a company's activities.”
We believe that our more than four-decade company history bears that out.