Job description

Requirements

  • Entry level
  • No Education
  • Salary to negotiate
  • Bangalore

Description

Qualifications
Minimum qualifications:
Bachelor's degree in Electrical Engineering or equivalent practical experience.
4 years of relevant experience.
Experience with ATPG, LV, BIST, JTAG tools and flow.
Experience in DFT of IPs (e.g., CPU, GPU, DDR).
Preferred qualifications:
Proficient with a scripting language like Perl. Proficient with Synthesis, Lint, CDC, LEC and DFT timing and STA.
Knowledge of high performance and low power design DFT techniques.
Understanding of the end to end flows - Design, Verification, DFT and PD.
Ability to scale DFT to the SoC, with a focus on low power and minimal area overhead.
About the job
Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a SoC/ASIC Design for Testability Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.
In this role, you will contribute to the Design for Testability (DFT) of complex System on Chip (SoC) and application-specific integrated circuit (ASIC) designs from design specification to production. You will collaborate with members of architecture, design, verification, power, timing, synthesis, etc. to deliver high quality DFT inserted RTL or netlist. You will solve technical problems with innovative and practical logic solutions. You will also evaluate design options to target the highest level of test coverage in mind.
Google's mission is to organize the world's information and make it universally accessible and useful. Our Hardware team researches, designs, and develops new technologies and hardware to make our user's interaction with computing faster, more powerful, and seamless. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, our Hardware team is making people's lives better through technology.
Responsibilities
Work on a team of DFT engineers, working closely with RTL and Physical Designer engineers.
Write basic to complex scripts to automate the DFT flow.
Develop tests that can be used for Production in the ATE flow.
Communicate and work with multi-disciplined and multi-site teams.

About the company

Google is not a conventional company, and we don't intend to become one. True, we share attributes with the world's most successful organizations - a focus on innovation and smart business practices comes to mind - but even as we continue to grow, we're committed to retaining a small-company feel. At Google, we know that every employee has something important to say, and that every employee is integral to our success.

We provide individually-tailored compensation packages that can be comprised of competitive salary, bonus, and equity components, along with the opportunity to earn further financial bonuses and rewards. Googlers thrive in small, focused teams and high-energy environments, believe in the ability of technology to change the world, and are as passionate

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