- Entry level
- No Education
- Salary to negotiate
Job type: Full-time
Industry: Consumer Electronics
Company size: 10k+ people
Company type: Public
Do you thrive on pushing the limit of RF analog circuit integration in advanced technology nodes for wireless transceivers? Do you like to innovate and improve RF layout methodologies for highly integrated RF circuits? As part of our RF IC analog layout design team, you get to be part of world-class RFIC design and layout teams, and will contribute to Apple’s wireless transceivers success. By joining us, you will help us innovate and design products that will continually outperform previous iterations and improve the product experience for our customers across the world.On this team, you will work closely with the RFIC design team to layout and verify custom RF and analog IP for complex RF products.Key Qualifications:
•Positions are available for multiple experience levels.
•We want you to have experience in custom analog layout from floorplan, placement, routing, and verification, with extensive experience on deep sub-micron CMOS (16nm, 7nm, etc.). mmWave experience is a plus.
•Knowledge in FinFet device structures, guard-rings, DNW, PN junctions, and advanced process effects such as LOD, WPE, and DFM etc. will be critical to your success.
•Understanding of trade-offs in matching, parasitic effects, high frequency routing, isolation, coupling, shielding, RC delay, EM, IR, ESD and latch-up is key.
•Working knowledge of Cadence Virtuoso and Mentor Calibre, and proficiency in interpreting verification results of DRC, LVS, ERC, and ANT are skills you need to succeed.
•We would welcome a great teammate with excellent communication skills to work with multi-functional teams.
•Please be prepared to proactively work with circuit designers for optimal solutions to problems, and recognize failure prone circuit and layout structures.
•You can benefit from the ability to provide accurate schedule and update plans to meet project milestones.
•Knowledge of Totem, EM/IR tools, PAD/EAD and constraint editor experience would be a plus.
•Experience with Skill, Python, Perl, layout scripts for automation and improvement of flow will be helpful.Description:
We expect you to perform:- Detailed transistor level layout of analog and RF circuit blocks including LNA, mixers, PLL, LO generation, modulators, power amplifiers, ADC/DAC, baseband filters, and bandgap/bias/LDO.
- Layout of sensitive analog components including resistors, capacitors, and inductors.
- Block level and top-level layout through full verification flow including extraction, DRC, LVS, and DFM.
- Collaborate with designers on block level placement and top-level floor planning.
- Layout review for power/ground routing, electro-migration, power distribution, signal path, differential and IQ matching, and signal coupling.
- Top-level layout integration, verification, and project schedule management.Education:
BSEE or equivalent would set you up for success in this role.Apple is an Equal Opportunity Employer that is committed to inclusion and diversity. We also take affirmative action to offer employment and advancement opportunities to all applicants, including minorities, women, protected veterans, and individuals with disabilities. Apple will not discriminate or retaliate against applicants who inquire about, disclose, or discuss their compensation or that of other applicants.
- ms project